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an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. CSD95490Q5MC slps669 ? march 2017 CSD95490Q5MC synchronous buck nexfet ? smart power stage 1 1 features 1 ? 75-a continuous operating current capability ? over 95% system efficiency at 30 a ? high-frequency operation (up to 1.25 mhz) ? diode emulation function ? temperature compensated bi-directional current sense ? analog temperature output ? fault monitoring ? 3.3-v and 5-v pwm signal compatible ? tri-state pwm input ? integrated bootstrap switch ? optimized dead time for shoot-through protection ? high-density qfn 5-mm 6-mm footprint ? ultra-low-inductance package ? system optimized pcb footprint ? thermally enhanced topside cooling ? rohs compliant ? lead-free terminal plating ? halogen free application diagram 2 applications ? multiphase synchronous buck converters ? high-frequency applications ? high-current, low-duty cycle applications ? pol dc-dc converters ? memory and graphic cards ? desktop and server vr12.x / vr13.x v-core synchronous buck converters ? high-current pol for network communications 3 description the CSD95490Q5MC nexfet ? power stage is a highly optimized design for use in a high-power, high- density synchronous buck converter. this product integrates the driver ic and power mosfets to complete the power stage switching function. this combination produces high-current, high-efficiency, and high-speed switching capability in a small 5-mm 6-mm outline package. it also integrates the accurate current sensing and temperature sensing functionality to simplify system design and improve accuracy. in addition, the pcb footprint has been optimized to help reduce design time and simplify the completion of the overall system design. device information (1) device media qty package ship CSD95490Q5MC 13-inch reel 2500 qfn 5.00-mm 6.00-mm package tape and reel CSD95490Q5MCt 7-inch reel 250 (1) for all available packages, see the orderable addendum at the end of the data sheet. typical power stage efficiency and power loss output current (a) efficiency (%) power loss (w) 0 15 30 45 60 75 30 0 40 3 50 6 60 9 70 12 80 15 90 18 100 21 d000 v dd = 5 v v in = 12 v v out = 1.8 v l out = 150 nh f sw = 600 khz t a = 25 q c CSD95490Q5MC boot boot_r vos vsw tao refin iout pgnd lset vdd en/fccm pwm vin CSD95490Q5MC boot boot_r vos vsw tao refin iout pgnd lset vdd en/fccm pwm vin csd95492qvm boot boot_r vos vsw tao refin iout pgnd lset pvdd vdd en/fccm pwm vin tps53679 avsp avsn addr pwm1 askip# acsp1 tsen apwm6 acsp6 vref bvsn bvsp bpwm1 bskip# bcsp1 v3p3 vin_csnin cspin ben_vccio sclk sdio salert# pin_alt# vr_hot# smb_clk smb_alert# smb_dio avr_rdy bvr_rdy avr_en vr_fault# reset# agnd vccio p12v p12v p12v p12v 3.3v vref load load p5v p5v p5v copyright ? 2016, texas instruments incorporated tools & software technical documents ordernow productfolder support &community
2 CSD95490Q5MC slps669 ? march 2017 www.ti.com product folder links: CSD95490Q5MC submit documentation feedback copyright ? 2017, texas instruments incorporated table of contents 1 features .................................................................. 1 2 applications ........................................................... 1 3 description ............................................................. 1 4 revision history ..................................................... 2 5 pin configuration and functions ......................... 3 6 specifications ......................................................... 4 6.1 absolute maximum ratings ...................................... 4 6.2 esd ratings .............................................................. 4 6.3 recommended operating conditions ....................... 4 7 application schematic .......................................... 5 8 device and documentation support .................... 6 8.1 receiving notification of documentation updates .... 6 8.2 community resources .............................................. 6 8.3 trademarks ............................................................... 6 8.4 electrostatic discharge caution ................................ 6 8.5 glossary .................................................................... 6 9 mechanical, packaging, and orderable information ............................................................. 7 9.1 mechanical drawing .................................................. 7 9.2 recommended pcb land pattern ............................ 8 9.3 recommended stencil opening ............................... 9 4 revision history date revision notes march 2017 * initial release.
3 CSD95490Q5MC www.ti.com slps669 ? march 2017 product folder links: CSD95490Q5MC submit documentation feedback copyright ? 2017, texas instruments incorporated 5 pin configuration and functions top view pin functions pin description name number refin 1 external reference voltage input for current sensing amplifier. iout 2 output of current sensing amplifier. v(iout) ? v(refin) is proportional to the phase current. lset 3 a resistor from this pin to pgnd pin sets the inductor value for the internal current sensing circuitry. vdd 4 supply voltage for gate drivers and internal circuitry. vos 5 output voltage sensing pin for the internal current sensing circuitry. sw 6 phase node connecting the hs mosfet source and ls mosfet drain ? pin connection to the output inductor. vin 7 input voltage pin. connect input capacitors close to this pin. bootr 8 return path for hs gate driver. it is connected to vsw internally. boot 9 bootstrap capacitor connection. connect a minimum 0.1- f, 16-v, x5r ceramic cap from boot to bootr pins. the bootstrap capacitor provides the charge to turn on the control fet. the bootstrap diode is integrated. pwm 10 tri-state input from external controller. logic low sets control fet gate low and sync fet gate high. logic high sets control fet gate high and sync fet gate low. both mosfet gates are set low if pwm stays in hi-z for greater than the tri-state shutdown hold-off time (t 3ht ). en/fccm 11 this dual function pin either enables the diode emulation function or can be used as a simple enable for the device. when this pin is driven into the tri-state window and held there for more than the tri-state holdoff time, diode emulation mode (dem) is enabled for sync fet. when the pin is high, device operates in forced continuous conduction mode (fccm). when the pin is low, both fets are held off. an internal resistor pulls this pin low if left floating. tao/fault 12 temperature amplifier output. reports a voltage proportional to the ic temperature. an oring diode is integrated in the ic. when used in multiphase application, a single wire can be used to connect the tao pins of all the ics. only the highest temperature will be reported. tao will be pulled up to 3.3 v if thermal shutdown, lsoc, or hss detection circuit is tripped. pgnd 13 power ground. 1 2 3 4 5 6 7 8 9 10 11 12 13 refin iout lset vdd vos sw pgnd vin bootr boot pwm en/fccm tao/flt
4 CSD95490Q5MC slps669 ? march 2017 www.ti.com product folder links: CSD95490Q5MC submit documentation feedback copyright ? 2017, texas instruments incorporated (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) should not exceed 7 v. 6 specifications 6.1 absolute maximum ratings t a = 25 c (unless otherwise stated) (1) min max unit v in to p gnd ? 0.3 20 v v in to v sw ? 0.3 20 v v in to v sw (10 ns) 23 v v sw to p gnd ? 0.3 20 v v sw to p gnd (10 ns) ? 7 23 v v dd to p gnd ? 0.3 7 v en/fccm, tao/flt, lset to p gnd (2) ? 0.3 v dd + 0.3 v iout, vos, pwm to p gnd ? 0.3 7 v refin ? 0.3 3.6 v boot to bootr (2) ? 0.3 v dd + 0.3 v boot to p gnd ? 0.3 30 v t j operating junction temperature ? 55 150 c t stg storage temperature ? 55 150 c 6.2 esd ratings value unit v (esd) electrostatic discharge human-body model (hbm) 2000 v charged-device model (cdm) 500 (1) operating at high v in can create excessive ac voltage overshoots on the switch node (v sw ) during mosfet switching transients. for reliable operation, the switch node (v sw ) to ground voltage must remain at or below the absolute maximum ratings . (2) measurement made with six 10- f (tdk c3216x7r1c106kt or equivalent) ceramic capacitors across v in to p gnd pins. (3) system conditions as defined in note 2. peak output current is applied for t p = 50 s. 6.3 recommended operating conditions t a = 25 c (unless otherwise stated) parameter conditions min max unit v dd driver supply voltage 4.5 5.5 v v in input supply voltage (1) 4.5 16 v v out output voltage 5.5 v pwm pwm to p gnd v dd + 0.3 v i out continuous output current v in = 12 v, v dd = 5 v, v out = 1.2 v, ? sw = 500 khz (2) 75 a i out-pk peak output current (3) 105 a ? sw switching frequency c bst = 0.1 f (min), v out = 2.5 v (max) 1250 khz on-time duty cycle ? sw = 1 mhz 85% minimum pwm on-time 20 ns operating junction temperature ? 40 125 c
5 CSD95490Q5MC www.ti.com slps669 ? march 2017 product folder links: CSD95490Q5MC submit documentation feedback copyright ? 2017, texas instruments incorporated 7 application schematic figure 1. application schematic note: the schematic in figure 1 is a conceptual drawing only. actual designs may require additional components not shown. CSD95490Q5MC boot boot_r vos vsw tao refin iout pgnd lset vdd en/fccm pwm vin CSD95490Q5MC boot boot_r vos vsw tao refin iout pgnd lset vdd en/fccm pwm vin csd95492qvm boot boot_r vos vsw tao refin iout pgnd lset pvdd vdd en/fccm pwm vin tps53679 avsp avsn addr pwm1 askip# acsp1 tsen apwm6 acsp6 vref bvsn bvsp bpwm1 bskip# bcsp1 v3p3 vin_csnin cspin ben_vccio sclk sdio salert# pin_alt# vr_hot# smb_clk smb_alert# smb_dio avr_rdy bvr_rdy avr_en vr_fault# reset# agnd vccio p12v p12v p12v p12v 3.3v vref load load p5v p5v p5v copyright ? 2016, texas instruments incorporated
6 CSD95490Q5MC slps669 ? march 2017 www.ti.com product folder links: CSD95490Q5MC submit documentation feedback copyright ? 2017, texas instruments incorporated 8 device and documentation support 8.1 receiving notification of documentation updates to receive notification of documentation updates, navigate to the device product folder on ti.com. in the upper right corner, click on alert me to register and receive a weekly digest of any product information that has changed. for change details, review the revision history included in any revised document. 8.2 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 8.3 trademarks nexfet, e2e are trademarks of texas instruments. all other trademarks are the property of their respective owners. 8.4 electrostatic discharge caution these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 8.5 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions.
7 CSD95490Q5MC www.ti.com slps669 ? march 2017 product folder links: CSD95490Q5MC submit documentation feedback copyright ? 2017, texas instruments incorporated 9 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation. 9.1 mechanical drawing 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. the package thermal pads must be soldered to the printed circuit board for thermal and mechanical performance. 4. exposed tie bar features may vary. c 22x 0.3 0.2 5.4 0.1 10x 0.6 0.4 2x 5 3.3 0.1 20x 0.5 1.05 max 0.05 0.00 2x (0.31) 2x 0.6 0.4 b 5.1 4.9 a 6.1 5.9 (0.2) typ 2x (2) 4x (0.25) (0.51) (0.51) typ 4223036/a 07/2016 pin 1 index area seating plane 0.08 c note 4 typ 1 6 7 12 (optional) pin 1 id 0.1 c a b 0.05 c exposed thermal pad 13 note 4
8 CSD95490Q5MC slps669 ? march 2017 www.ti.com product folder links: CSD95490Q5MC submit documentation feedback copyright ? 2017, texas instruments incorporated 9.2 recommended pcb land pattern 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. this package is designed to be soldered to thermal pads on the board. for more information, see qfn/son pcb attachment (slua271). 4. vias are optional depending on application, refer to device data sheet. if any vias are implemented, refer to their locations shown on this view. it is recommended that vias under paste be filled, plugged or tented. 0.05 min all around 0.05 max all around solder mask opening solder mask metal under solder mask defined (pads 6 - 7, optional for other pads) metal solder mask opening non solder mask defined (preferred for pads 1 - 5 & 8 - 12) (0.05) typ 2x (1.13) 6x (1.32) 2x (0.31) 2x (2.85) (3.3) 20x (0.5) (4.7) 22x (0.25) 10x (0.7) (5.4) (r0.05) typ ( 0.2) via typ 6x (1.4) 2x (0.7) symm 1 6 7 12 symm 13 metal under solder mask 2x solder mask opening 2x 5 8
9 CSD95490Q5MC www.ti.com slps669 ? march 2017 product folder links: CSD95490Q5MC submit documentation feedback copyright ? 2017, texas instruments incorporated 9.3 recommended stencil opening 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. ipc-7525 may have alternate design recommendations. 2x (0.31) 2x (0.7) 22x (0.25) 10x (0.7) 20x (0.5) 8x (1.12) 8x (1.41) (4.7) (r0.05) typ (0.66) typ (1.32) typ (0.8) typ solder paste example symm 1 6 7 12 symm typ metal 13 metal under solder mask 2x 5 8
package option addendum www.ti.com 13-sep-2017 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples CSD95490Q5MC active vson-clip dmc 12 2500 green (rohs & no sb/br) cu sn level-2-260c-1 year -55 to 150 95490mc CSD95490Q5MCt active vson-clip dmc 12 250 green (rohs & no sb/br) cu sn level-2-260c-1 year -55 to 150 95490mc (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) rohs: ti defines "rohs" to mean semiconductor products that are compliant with the current eu rohs requirements for all 10 rohs substances, including the requirement that rohs substance do not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, "rohs" products are suitable for use in specified lead-free processes. ti may reference these types of products as "pb-free". rohs exempt: ti defines "rohs exempt" to mean products that contain lead but are compliant with eu rohs pursuant to a specific eu rohs exemption. green: ti defines "green" to mean the content of chlorine (cl) and bromine (br) based flame retardants meet js709b low halogen requirements of <=1000ppm threshold. antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
package option addendum www.ti.com 13-sep-2017 addendum-page 2
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant CSD95490Q5MC vson- clip dmc 12 2500 330.0 12.4 5.3 6.3 1.2 8.0 12.0 q1 CSD95490Q5MCt vson- clip dmc 12 250 180.0 12.4 5.3 6.3 1.2 8.0 12.0 q1 package materials information www.ti.com 8-sep-2017 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) CSD95490Q5MC vson-clip dmc 12 2500 370.0 355.0 55.0 CSD95490Q5MCt vson-clip dmc 12 250 195.0 200.0 45.0 package materials information www.ti.com 8-sep-2017 pack materials-page 2
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